Abstract: The fabrication of microelectronics involves highly intricate processes such as etching and deposition, where precision is crucial to the performance and reliability of the final devices. This presentation investigates the application of process simulation in microelectronics using the ViennaPS framework, a comprehensive tool designed to model and optimize these fabrication processes.

We start with a foundational overview of microelectronics fabrication, with a specific focus on the etching and deposition techniques that are central to the manufacturing process. Understanding these processes is essential for appreciating the complexities and challenges involved in microelectronics production and further provide a motivation for why process simulation is becoming more and more present in the industry.

The core of this work is the ViennaPS framework, whose structure and key methodologies, including the Level-Set method and Monte Carlo ray tracing, are presented. These methods are crucial for simulating intricate fabrication processes with high accuracy.

We then further explore current projects utilizing ViennaPS, such as multi-scale process simulation, which bridges different scales of fabrication processes; compact modeling with machine learning, aimed at enhancing simulation efficiency and accuracy; and advanced meshing techniques to seamlessly integrate process simulation with device simulation.

These investigations highlight the versatility and effectiveness of ViennaPS in enhancing microelectronics fabrication, contributing to more efficient and precise manufacturing processes. 

Short bio: Tobias Reiter obtained his Master's degree (Dipl.-Ing.) in Technical Physics in 2022 and is currently completing the inter-faculty Master Program (MSc.) Computational Science and Engineering, both at TU Wien. He joined the IµE as a doctoral candidate in 2022, where he is working on semiconductor process simulation. His current research focuses on the development of the process simulation library ViennaPS, where he is developing models for novel etching and deposition processes for semiconductor fabrication. He is also part of the Christian Doppler Laboratory for Multi-Scale Process Modeling of Semiconductors Devices and Sensors.

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